Publications | David Hely

Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Regis Leveugle, Paolo Maistri, Giorgio Di Natale, others

Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault model

Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Stephan De Castro, Faber Louis-Barthelemy, Marie-Lise Flottes, Gendrier Philippe, David Hely, Régis Leveugle, Paolo Maistri, others

Hardware Trojan Detection Using an Advised Genetic Algorithm Based Logic Testing

M. A. Nourian, Mahdi Fazeli, David Hély

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ESCALATION: Leveraging Logic Masking to Facilitate Path-Delay-Based Hardware Trojan Detection Methods

Arash Nejat, David Hely, Vincent Beroulle

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System, method and computer-accessible medium for low-overhead security wrapper for memory access control of embedded systems

Ramesh Karri, Jerry Backer, David Hely

Radiated Electromagnetic Emission for Integrated Circuit Authentication

M. M. Ahmed, D. Hely, N. Barbot, R. Siragusa, E. Perret, M. Bernier, F. Garet

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Potential of chipless authentication based on randomness inherent in fabrication process for RF and THz

Z. Ali, F. Bonnefoy, R. Siragusa, N. Barbot, D. Hely, E. Perret, M. Bernier, F. Garet

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Towards a robust and efficient EM based authentication of FPGA against counterfeiting and recycling

M. M. Ahmed, D. Hely, N. Barbot, R. Siragusa, E. Perret, M. Bernier, F. Garet

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Secure and Flexible Trace-Based Debugging of Systems-on-Chip

Jerry Backer, David Hély, Ramesh Karri

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Key Reconciliation Protocols for Error Correction of Silicon PUF Responses

B. Colombier, L. Bossuet, V. Fischer, D. Hély

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IoT Components LifeCycle Based Security Analysis

Johan Marconot, Florian Pebay-Peyroula, David Hély

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Enhanced Elliptic Curve Scalar Multiplication Secure Against Side Channel Attacks and Safe Errors

Jeremy Dubeuf, David Hély, Vincent Beroulle

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Centrality Indicators for Efficient and Scalable Logic Masking

Brice Colombier, Lilian Bossuet, David Hély

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A red team blue team approach towards a secure processor design with hardware shadow stack

Cyril Bresch, Adrien Michelet, Laurent Amato, Thomas Meyer, David Hély

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A comprehensive hardware/software infrastructure for IP cores design protection

Brice Colombier, Lilian Bossuet, Ugo Mureddu, David Hély

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Reusing logic masking to facilitate path-delay-based hardware Trojan detection

A. Nejat, D. Hely, V. Beroulle

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Can Algorithm Diversity in Stream Cipher Implementation Thwart (Natural and) Malicious Faults?

X. Guo, C. Jin, C. Zhang, A. Papadimitriou, D. Hély, R. Karri

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Reusing logic masking to facilitate path-delay-based hardware Trojan detection

Arash Nejat, David Hély, Vincent Beroulle

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On the development of a new countermeasure based on a laser attack RTL fault model

Charalampos Ananiadis, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle

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On fault injections for early security evaluation vs. laser-based attacks

Régis Leveugle, A. Chahed, Paolo Maistri, Athanasios Papadimitriou, David Hély, Vincent Beroulle

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Implementation of a secured digital ultralight 14443-type A RFID tag with an FPGA platform

Yassine Naija, Vincent Beroulle, David Hély, Mohsen Machhout

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How logic masking can improve path delay analysis for Hardware Trojan detection

Arash Nejat, David Hély, Vincent Beroulle

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High output hamming-distance achievement by a greedy logic masking approach

Seyyed Mohammad Saleh Samimi, Ehsan Aerabi, Arash Nejat, Mahdi Fazeli, David Hély, Vincent Beroulle

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From secured logic to IP protection

Brice Colombier, Lilian Bossuet, David Hély

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ECDSA Passive Attacks, Leakage Sources, and Common Design Mistakes

Jeremy Dubeuf, David Hély, Vincent Beroulle

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Comparison of RTL fault models for the robustness evaluation of aerospace FPGA devices

Romain Champon, Vincent Beroulle, Athanasios Papadimitriou, David Hély, Gilles Genevrier, Frederic Cezilly

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Clock generator behavioral modeling for supply voltage glitch attack effects analysis

Noemie Beringuier-Boher, Vincent Beroulle, David Hély, Joel Damiens, Philippe Candelier

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Analysis of laser-induced errors: RTL fault models versus layout locality characteristics

Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle

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Validation of RTL laser fault injection model with respect to layout information

Athanasios Papadimitriou, Marios Tampas, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle

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Secure design-for-debug for Systems-on-Chip

Jerry Backer, David Hély, Ramesh Karri

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Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design Protection

Brice Colombier, Lilian Bossuet, David Hély

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On enhancing the debug architecture of a system-on-chip (SoC) to detect software attacks

Jerry Backer, David Hély, Ramesh Karri

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Facilitating side channel analysis by obfuscation for Hardware Trojan detection

Arash Nejat, David Hély, Vincent Beroulle

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A secure design-for-test infrastructure for lifetime security of SoCs

Jerry Backer, Sk Subidh Ali, Kurt Rosenfeld, David Hély, Ozgur Sinanoglu, Ramesh Karri

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Voltage Glitch Attacks on Mixed-Signal Systems

Noemie Beringuier-Boher, Kamil Gomina, David Hély, Jean-Baptiste Rigaud, Vincent Beroulle, Assia Tria, Joel Damiens, Philippe Gendrier, Philippe Candelier

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Reusing the IEEE 1500 design for test infrastructure for security monitoring of Systems-on-Chip

Jerry Backer, David Hély, Ramesh Karri

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On error models for RTL security evaluations

Pierre Vanhauwaert, Paolo Maistri, Régis Leveugle, Athanasios Papadimitriou, David Hély, Vincent Beroulle

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Laser-induced fault effects in security-dedicated circuits

Régis Leveugle, Paolo Maistri, Pierre Vanhauwaert, Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Guillaume Hubert, Stephan De Castro, Jean-Max Dutertre, Alexandre Sarafianos, Noemie Boher, Mathieu Lisart, Joel Damiens, Philippe Candelier, Clément Tavernier

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Laser-Induced Fault Effects in Security-Dedicated Circuits

Vincent Beroulle, Philippe Candelier, Stephan De Castro, Giorgio Di Natale, Jean-Max Dutertre, Marie-Lise Flottes, David Hély, Guillaume Hubert, Régis Leveugle, Feng Lu, Paolo Maistri, Athanasios Papadimitriou, Bruno Rouzeyre, Clément Tavernier, Pierre Vanhauwaert

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Fault tolerance evaluation of RFID tags

Omar Abdelmalek, David Hély, Vincent Beroulle

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Emulation based fault injection on UHF RFID transponder

Omar Abdelmalek, David Hély, Vincent Beroulle

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A multiple fault injection methodology based on cone partitioning towards RTL modeling of laser attacks

Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle

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Run-time detection of hardware Trojans: The processor protection unit

Jeremy Dubeuf, David Hély, Ramesh Karri