Philippe Candelier

Latest

• Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault model
• The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks
• Clock generator behavioral modeling for supply voltage glitch attack effects analysis
• Laser-Induced Fault Effects in Security-Dedicated Circuits
• Laser-induced fault effects in security-dedicated circuits
• Voltage Glitch Attacks on Mixed-Signal Systems
• Increasing the security level of analog IPs by using a dedicated vulnerability analysis methodology