David Hely
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Frédéric Bancel
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Electronic circuit comprising a test mode secured by insertion of decoy data in the test chain, associated method
Integrated circuit comprising a test mode secured by the use of an identifier, and associated method
Electronic circuit comprising a test mode secured by the breaking of a test chain, and associated electronic circuit
Detection of a disturbance in the state of an electronic circuit flip-flop
Integrated circuit comprising a test mode secured by detection of the state of a control signal
Method and device for securing the reading of a memory
Protecting an integrated circuit test mode
Protecting an integrated circuit test mode
Integrated circuit having configurable cells and a secured test mode
Method for testing an electronic circuit comprising a test mode secured by the use of a signature, and associated electronic circuit
Method of securing the test mode of an integrated circuit via intrusion detection
Securing Scan Control in Crypto Chips
A secure scan design methodology
Secure Scan Techniques: A Comparison
Test control for secure scan designs
Scan Design and Secure Chip
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